Qualcomm→
Physical Design Engineer at Qualcomm in San Diego, CA
Entry LevelOn-siteSan Diego, CA$98k–$148k/yr
Skills
asic designdigital designanalog designip block developmentsoc developmentarchitecture designcircuit specificationlogic designsystem simulationdesign verification methodsscripting languagesprogramming languagesrtl to gds flowvirtuoso eda tool
Job Description
Summary: Qualcomm Technologies, Inc. is a leading technology innovator that drives communication and data processing transformation. As a Physical Design Engineer, you will define, model, design, optimize, verify, validate, implement, and document IP development for high performance, low power products.
Responsibilities:
- Applies ASIC knowledge to assist and support the defining, modeling, designing (digital and/or analog), optimizing, verifying, validating, implementing, and documenting of IP (block/SoC) development for a variety of high performance, high quality, low power products
- Assists in the creation of architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements
- Collaborates with team members to assist in the development of an implementation strategy that meets system requirements and customer needs
- Supports the evaluation of process flow from high-level design to synthesis, place and route, and timing and power use, and verification or similarly for custom circuit design/layout flow
- Utilizes tools/applications (e.g., RTL to GDS Flow, Virtuoso) to execute and enable architecture and design of a specific part of a block/SoC or IC Package
- Writes technical documentation for EDA/IP/ASIC projects
Required Qualifications:
- Bachelor's degree in Science, Engineering, or related field
Preferred Qualifications:
- Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science
- 6+ months of experience with architecture and design tools
- 6+ months of experience with scripting tools and programming languages
- 6+ months of experience with design verification methods
Required Skills: ASIC design, Digital design, Analog design, IP block development, SoC development, Architecture design, Circuit specification, Logic design, System simulation, Design verification methods, Scripting languages, Programming languages, RTL to GDS flow, Virtuoso EDA tool
Benefits: Competitive annual discretionary bonus program, Opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus), Highly competitive benefits package is designed to support your success at work, at home, and at play
Benefits
Competitive annual discretionary bonus program
Opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus)
Highly competitive benefits package is designed to support your success at work, at home, and at play