Principal Engineer, RFIC Design at Kyocera in Location not listed

Principal Engineer, RFIC Design

Join Kyocera International, Inc.

We’re hiring a Principal Engineer, RFIC Design at our San Diego, CA location!

Join a stable, long-term opportunity where your work matters. We’re hiring a Principal Engineer, RFIC Design to support production and ensure high-quality output in a fast-paced manufacturing setting.

Pay Range - $135,000.00 to $304,000.00 annually (Actual base pay based on factors such as relevant experience, education, market, qualifications, and skills.)

With nearly 80,000 employees globally, Kyocera is a leading manufacturer of high-tech ceramics in various industries, including aerospace, automotive, Medical applications, and semiconductor processing. Our innovative materials are found in everything from smartphones to space shuttles! Check out our profile video!

Look at these PERKS!

• Competitive pay, benefits, and hours
• 120 hours of vacation accrued per year to start (that's 3 weeks/year for regular 8-hour shifts!)
• 10 Paid Holidays per year
• 401(k) with company match
• Pension
• Medical, dental, and vision insurance
• Flexible Spending Account (FSA)
• Employee Assistance Program
• Flexible schedules
• Tuition reimbursement

We have a long-tenured staff (many with over 30 years of service!), a vital company mission, and an excellent benefits package that includes medical, dental, vision, life insurance, paid time off to volunteer, paid leave options, tuition reimbursement, an employer-paid Pension and a 401(k) with both Roth and a healthy company match. Our larger locations also feature onsite gyms, walking tracks, exercise rooms, and employee gardens!

We strive to have a diverse workforce from all backgrounds, including minorities, women, and veterans, who bring their experience to support the innovation and quality that Kyocera is known for.

Kyocera International, Inc. also has a robust corporate culture and philosophy based on the experiences and writings of our founder, Dr. Kazuo Inamori, which you can learn more about here: https://global.kyocera.com/inamori/philosophy/. Our company motto is “Do the right thing as a human being,” and we try to use that motto constantly in our decision-making.

Exempt: Yes

Safety Sensitive: No

The Principal RFIC Design Engineer develops high-performance RF, analog, and mixed-signal SoCs for advanced wireless and sensing products. The role combines hands-on circuit design with module-level technical ownership, cross-functional leadership, and responsibility for delivering production-ready silicon. May bring deep expertise in receiver, transmitter, frequency-synthesizer/LO-generation, analog, or transceiver integration design.

RESPONSIBILITIES:

• Lead the architecture, design, layout, integration, verification, characterization, and productization of complex RFIC blocks or modules from concept through production ramp.

• Translate system requirements into block and module specifications, establish performance budgets, and make tradeoffs across power, area, noise, linearity, gain, bandwidth, phase noise, stability, calibration, thermal performance, and reliability.

• Perform hands-on design in one or more areas such as receivers, transmitters, PLLs and frequency synthesizers, LO generation and distribution, analog baseband, biasing, power management, calibration, or transceiver integration.

• Drive schematic, post-layout, PVT, Monte Carlo, EM, mixed-signal, electrothermal, and reliability verification; identify technical risks and close performance gaps using simulation and measurement.

• Guide floorplanning and critical layout, including device matching, parasitic control, shielding, isolation, power integrity, passive structures, and physical verification.

• Lead RFIC-package-PCB-antenna co-design and modeling to account for interconnects, coupling, passives, supply integrity, thermal effects, and conducted or over-the-air performance.

• Define silicon characterization and production-test strategies with Test and Product Engineering, including observability, calibration, guard bands, yield analysis, and correlation between simulation, bench measurements, and ATE.

• Lead silicon debug and resolve complex circuit, integration, customer, field, and yield issues in collaboration with Systems, Layout, Package, PCB, Firmware, Software, Applications, Test, and Manufacturing teams.

• Mentor engineers, lead design and data reviews, establish sound engineering practices, and communicate technical decisions, risks, and status to program teams and management.

• Contribute to technology and product roadmaps, design methodology improvements, and the creation and protection of intellectual property.

QUALIFICATIONS:

• M.S. or Ph.D. in Electrical Engineering or a related field, with at least 10 years of relevant industry experience in analog and mmWave IC design.

• Demonstrated success delivering complex RFIC blocks or modules from architecture and transistor-level design through layout, silicon validation, and production ramp.

• Deep expertise in one or more relevant areas, including receiver design, transmitter design, PLL and frequency-synthesizer design, LO generation and distribution, analog baseband, calibration, power management, or transceiver integration.

• Strong command of RF and analog design concepts, including device physics, noise, linearity, mismatch, feedback, stability, phase noise, modulation impairments, process variation, thermal effects, and reliability.

• Experience designing and reviewing critical circuits such as LNAs, PAs and drivers, mixers, VGAs, filters, op amps, oscillators, PLLs, dividers, phase shifters, detectors, bias circuits, regulators, and calibration loops, as applicable to the candidate's specialty.

• Strong knowledge of CMOS and/or SOI technologies, deep-submicron effects, RF passives and EM structures, RFIC layout, coupling and isolation, power integrity, and design-for-manufacturability.

• Proficiency with Cadence Virtuoso, Spectre, RF simulation, EM extraction, statistical analysis, mixed-signal verification, and physical-verification tools; familiarity with electrothermal and behavioral modeling is preferred.

• Strong laboratory and silicon-debug experience, with the ability to define measurements, interpret results, and correlate bench and ATE data with simulation.

• Proven technical leadership and mentoring skills, including the ability to lead cross-functional reviews, manage technical risk, and drive timely decisions without losing hands-on design depth.

• Excellent analytical, communication, teamwork, and documentation skills; familiarity with applicable wireless, sensing, emissions, and compliance requirements is desirable.

Physical Activities

The following physical activities described here are representative of those that must be met by an employee to successfully perform the essential functions of this job. Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions and expectations.

While performing the functions of this job, the employee is continuously required to talk or hear; regularly required to sit; frequently required to stand, walk; and occasionally required to use hands to finger, handle, or feel, reach with hands and arms, stoop, kneel, crouch, or crawl.

The employee must occasionally lift and/or move up to 25 pounds, frequently lift and/or move up to 10 pounds. Specific vision abilities required by this job include close vision, and color vision.

Environmental Conditions

The following work environment characteristics described here are representative of those an employee encounters while performing essential functions of this job. Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions.

While performing the functions of this job, the employee is occasionally exposed to work near moving mechanical parts, work in high, precarious places, fumes, or airborne particles.

The noise level in the work environment is usually moderate.

Additional Information
The above statements are intended to describe the work being performed by people assigned to this job. They are not intended to be an exhaustive list of all responsibilities, duties and skills required. The duties and responsibilities of this position are subject to change and other duties may be assigned or removed at any time. This position may require exposure to information subject to US Export Control regulations, i.e.: the International Traffic and Arms Regulations (ITAR) or Export Administration Regulations (EAR). All applicants must be US persons within the meaning of US regulations.

Kyocera International, Inc. values diversity in its workforce, and is proud to be an AAP/EEO employer. All qualified applicants will receive consideration for employment without regard to race, sex, color, religion, sexual orientation, gender identity, national origin, protected veteran status, or on the basis of disability.

If you are an individual with a disability and require a reasonable accommodation to complete any part of the application process, or are limited in the ability or unable to access or use this online application process and need an alternative method for applying, you may contact Kyocera International, Inc. Human Resources team directly.
Reasonable accommodations may be made to enable individuals with disabilities to perform essential functions.