Principal Applications Scientist, Memory Device &… at ASML · South…

Principal Applications Scientist, Memory Device & Process Integration
Location: Hwasung, Korea
Principal Applications Scientist, Memory Device & Process Integration
Location: Korea
Introduction to the role
ASML’s Technology Development Center, TDC, helps shape the company’s long-term technology direction by connecting semiconductor industry developments with future product and technology roadmaps.
We are looking for an experienced memory technology professional to analyze future memory device architectures and process-integration challenges from a global industry perspective. The primary focus of the role will be advanced DRAM device architecture and process integration, covering major technology paths and customer-specific approaches across the global DRAM industry.
In this role, you will own assigned DRAM-related technical topics, develop the underlying technology scenarios and roadmap inputs, and translate your insights into relevant implications for ASML product and technology roadmaps. You may also contribute to broader memory technology discussions where your expertise and analytical perspective are relevant.
You will collaborate with experts across ASML, customers, research organizations and external technology partners. The position is based in Korea, while its technology and stakeholder scope is global.
Roles and responsibilities
• Analyze future DRAM device, cell and array architectures and their process-integration implications.
• Reconstruct and evaluate process-integration flows for evolving and emerging DRAM architectures.
• Assess the interaction between device architecture, layout, materials, dimensions and process conditions.
• Identify physical limits, critical dependencies, integration risks and unresolved technical challenges.
• Follow relevant developments through customer inputs, publications, patents, conferences, internal sources and expert discussions.
• Develop and evaluate technical hypotheses using incomplete, evolving and sometimes conflicting information.
• Compare alternative technology paths and identify the conditions required for their technical feasibility and transition.
• Clearly distinguish technical evidence, assumptions, interpretations and uncertainties.
• Develop and maintain technology roadmaps for assigned DRAM device and process-integration topics, including their technical basis, alternative scenarios and open questions.
• Identify critical layers, process steps and requirements arising from future DRAM architectures.
• Translate device and process-integration developments into relevant implications for ASML technology areas.
• Work with experts across technical disciplines to validate assumptions and develop technically grounded recommendations.
• Contribute DRAM technology insights and roadmap inputs to the overall TDC memory roadmap and relevant ASML product and technology discussions.
• Provide technical guidance and knowledge transfer to stakeholders with different technical backgrounds.
• Participate in and, where appropriate, lead technical discussions with customers, research organizations and technology partners.
Education and experience
• Master’s degree or PhD in Electrical Engineering, Materials Science, Applied Physics, Chemical Engineering or a related scientific or engineering discipline.
• Proven industry or research experience in memory device development, device integration or process integration.
• Demonstrated experience analyzing complex device structures and process-integration flows.
• Experience independently driving complex technical topics from problem definition through analysis and recommendation.
• Experience working across technical disciplines to develop and validate conclusions.
• Experience translating detailed technical analysis into technology direction, roadmap input or organizational recommendations.
Skills
• Deep understanding of semiconductor device physics, device architecture or process integration in at least one memory technology area.
• Ability to connect device requirements and unit processes with the overall integration flow.
• Ability to identify physical limitations, critical integration dependencies and potential technical risks.
• Ability to decompose complex technical questions into key variables and testable hypotheses.
• Ability to develop credible technical scenarios from incomplete or conflicting information.
• Ability to compare multiple technology paths without prematurely converging on a single scenario.
• Ability to communicate the basis, validity range and uncertainty of technical conclusions.
• Ability to independently own a defined technical domain while actively seeking input and alignment from relevant experts.
• Ability to communicate complex technical concepts clearly to experts in adjacent disciplines.
• Ability to provide technical guidance, conduct reviews and transfer knowledge within an assigned area of expertise.
• Ability to build and maintain an effective global network of technical stakeholders.
Preferred qualifications
• Experience in DRAM device or process integration.
• Experience with advanced DRAM scaling, alternative cell architectures or future DRAM integration concepts.
• Experience in technology pathfinding or roadmap development.
• Experience reconstructing customer or industry technology direction from indirect or limited information.
• Experience collaborating with semiconductor customers, research organizations or external technology partners.
• Experience leading technical reviews involving multiple engineering disciplines.
• Experience with device or process simulation, physical estimation or sensitivity analysis.
Prior knowledge of ASML products, lithography, patterning, metrology or inspection is beneficial but not required. These areas can be developed after joining through collaboration with relevant ASML experts.
Context of the position
This is an individual-contributor position with substantial technical ownership and functional leadership. The successful candidate will primarily own advanced DRAM device and process-integration topics and contribute the resulting insights to the integrated TDC memory roadmap and relevant ASML technology discussions.
The role is based in Korea but covers DRAM technology developments and customer-specific approaches from a global industry perspective. It is not limited to customers or technology developments in a particular region.
The role does not include people-management responsibility or final ownership of the overall TDC memory roadmap. It requires the ability to independently develop technical analyses and roadmap recommendations within the assigned DRAM scope while working closely with experts across organizational and geographic boundaries.
This position requires access to controlled technology, as defined in theUnited StatesExport Administration Regulations (15 C.F.R. § 730, et seq.). Qualified candidates must be legally authorized to access such controlled technology prior to beginning work. Business demands may require ASML to proceed with candidates who are immediately eligible to access controlled technology.
Inclusion and diversity
ASML is an Equal Opportunity Employer that values and respects the importance of a diverse and inclusive workforce. It is the policy of the company to recruit, hire, train and promote persons in all job titles without regard to race, color, religion, sex, age, national origin, veteran status, disability, sexual orientation, or gender identity. We recognize that inclusion and diversity is a driving force in the success of our company.
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