Design Verification Engineer, Intern at Tenstorrent in Boston, MA

Summary: Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. As a Design Verification Engineer Intern, you will help ensure the functional correctness and robustness of Tenstorrent’s next-generation RISC‑V and AI accelerator SoCs by building verification environments and developing tests. Responsibilities: - Help develop and maintain SystemVerilog/UVM testbenches for SoC IP blocks and subsystems, including stimulus, checkers, and scoreboards - Write and refine verification test plans from architectural and micro‑architectural specifications, with a strong focus on corner cases and coverage - Develop constrained‑random and directed tests, run regressions, and triage failures by working closely with RTL designers to root-cause issues - Analyze functional and code coverage results, identify gaps, and propose additional tests or checks to drive coverage closure - Contribute to automation and infrastructure (scripts, Makefiles, CI hooks, dashboards) that improve verification productivity and debug turnaround time - Partner with cross‑functional teams (architecture, design, performance, validation) to align on expected behavior and sign‑off criteria for silicon - Have impact measured through coverage metrics achieved, quality and reproducibility of bugs found, and robustness of the verification environment you help build Required Qualifications: - Pursuing a B.S., M.S. or PhD. in Electrical Engineering, Computer Engineering, Computer Science, or a related field with a focus on digital design and verification - Strong understanding of digital logic design and computer architecture (pipelines, caches, interconnects, memory systems) - Familiar with HDLs such as Verilog/SystemVerilog, and interested in learning Formal verification, Cocotb, and UVM‑based verification methodologies - Comfortable working in Linux-based development environments and using scripting languages (e.g., Python, Shell, Perl) to automate tasks - Detail-oriented problem solver who enjoys debugging complex issues, reasoning about corner cases, and working from specifications - Collaborative team member with clear communication skills, able to document work and discuss trade‑offs with RTL, architecture, and validation teams Required Skills: Digital logic design, Computer architecture, Verilog, SystemVerilog, SystemVerilog/UVM verification methodologies, Formal verification, Cocotb, Linux development environment, Python scripting, Shell scripting, Perl scripting, Testbench development, Verification test plan writing, Constrained-random testing, Directed testing, Regression testing, Functional coverage analysis, Code coverage analysis, Automation scripting, Makefiles, Continuous integration (CI), Debugging complex issues, Hardware specification interpretation, Detail-oriented problem solving