Product Test Engineer II at Silicon Laboratories Inc. in SG

Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at www.silabs.com.

Meet the Team

The Product & Test Engineering (PTE) team enables high-quality, scalable launches of Silicon Labs wireless SoCs and modules across BLE, Zigbee, Wi-Fi, and IoT applications. This role bridges Design, Quality, and Manufacturing to ensure robust release, strong yield, and reliable high-volume production from first silicon through lifecycle support.

Responsibilities

Product Characterization & Qualification

• Own product engineering from first silicon through NPI and production ramp across wafer sort and final test
• Lead silicon bring-up and characterization across PVT (process, voltage, temperature); define guardbands and release criteria
• Plan and execute qualification (JEDEC/AEC), including reliability strategy and stress validation

Test Development Execution

• Define production test strategy aligned with product architecture and customer requirements
• Develop and release scalable ATE test programs (e.g., Teradyne UltraFlex/J750)
• Design and qualify manufacturing test hardware (load boards, burn-in boards)
• Optimize test time, coverage, and cost; manage OSAT transfer and correlation

Yield & Data-Driven Improvement

• Analyze wafer probe and final test data to drive yield, screening effectiveness, and test correlation
• Lead root cause analysis for yield excursions, test escapes, and customer returns
• Monitor fab and test KPIs to sustain stable mass production

Technical Leadership

• Mentor engineers and lead cross-functional technical reviews
• Drive methodology, automation, and process improvements across product and test flows

Skills You Will Need

Minimum Qualifications:

• BS/MS in Electrical Engineering or related field
• 5+ years in semiconductor Product and/or Test Engineering for high-volume products
• Strong understanding of wafer sort, final test, and IC manufacturing fundamentals
• Solid understanding of ATE fundamentals (DC/parametric, digital, timing, instrumentation)
• Experience with ATE platforms (e.g., Teradyne UltraFlex, J750, or equivalent)
• Proficiency in C/C++ and Python for test development or data analysis
• Strong statistical and data analysis capability
• Experience debugging test hardware and software in manufacturing environments

Preferred qualifications :

• ​Experience with wireless/IoT SoCs (BLE, Zigbee, Wi-Fi, Matter)
• Experience with analog, mixed-signal or/and RF production test methods
• Knowledge of JEDEC/AEC qualification and reliability standards
• Experience with burn-in design and stress patterns (HTOL, ELFR, HAST)
• Familiarity with automation frameworks and version control (e.g., Git)
• Experience working in global cross-functional teams

Benefits & Perks:

Not only will you be joining a highly skilled and tight-knit team where every engineer makes a significant impact on the product; we also strive for good work/life balance and to make our environment welcoming and fun.

• Medical and dental insurance coverage including spouse and child(ren)
• Bi yearly health screening and flu vaccination
• Office location is above Tai Seng MRT station

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Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.