In-Order Tile TestBench Design Verification… at SiFive · Hyderabad

In-Order Tile TestBench Design Verification Engineer

Location: Hyderabad, India

About SiFive

As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits.

At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are.

Our constant innovation and ongoing success is down to our amazing teams of incredibly talented people, who collaborate and support each other to come up with truly groundbreaking ideas and solutions. Solutions that will have a huge impact on people's lives; making the world a better place, one processor at a time.

Are you ready?

To learn more about SiFive’s phenomenal success and to see why we have won the GSA’s prestigious Most Respected Private Company Award (for the fourth time!), check out our website and Glassdoor pages.

Job Description:

Key Responsibilities

• Verification Strategy: Define and execute comprehensive verification plans for CPU sub-systems (e.g., Load/Store units, Memory Management Units, or Execution Pipelines).

• Testbench Development: Build and maintain advanced, scalable verification environments using UVM (Universal Verification Methodology) and SystemVerilog.

• Test Content Creation: Develop constrained-random stimulus, directed tests, and assembly-level tests to achieve rigorous coverage targets.

• Debug & Analysis: Lead complex debugging efforts at the unit and SOC levels, identifying architectural and RTL bugs.

• Mentorship: Provide technical leadership and guidance to junior verification engineers, ensuring best practices in coding and verification logic.

Required Skills & Qualifications

• Experience: 6+ years of experience in ASIC/SOC verification, specifically focused on CPU or complex IP blocks.

• Technical Proficiency: knowledge of SystemVerilog and UVM.

• Architecture Knowledge: Strong understanding of Computer Architecture (pipelines, caches, out-of-order execution, and memory consistency models).

• Education: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.

Preferred Qualifications

• Experience with the RISC-V or ARM/x86 ISA and CPU verification experience

Additional Information:

This position requires a successful background and reference checks and satisfactory proof of your right to work in:

India

Any offer of employment for this position is also contingent on the Company verifying that you are a authorized for access to export-controlled technology under applicable export control laws or, if you are not already authorized, our ability to successfully obtain any necessary export license(s) or other approvals.

SiFive is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.