Sr. Principal SRAM/ROM Modeling/Verification… at NXP… · Chandler

Sr. Principal SRAM/ROM Modeling/Verification Engineer Location: Chandler (Office) NXP’s Memories team is seeking an experienced engineer to lead development and verification of memory models for our SRAM and ROM memory designs. Our team is part of the Design Enablement/Foundation IP organization within the Chief Technology Office at NXP. We provide SRAM/ROM memory solutions to NXP SoC design teams across multiple business lines- your work will have real impact to our design teams and, through them, our end customers. Job Summary: Develop memory models for new SRAM and ROM compilers, including Verilog behavioral, emulation, and ATPG models. Work closely with our circuit design team to understand the memory functionality, and with our CAD team to embed model validation steps and checkers into our design flow. Engage with SoC and BL teams to understand and define their model requirements. Drive improvements to memory modeling methodology. Develop and support functional testbenches for memory models. Engage with our global NXP memory design team partners, and work toward common modeling practices and methodologies. Key Challenges: Developing models for memory compilers with multiple design features to support our customers (including power modes, DFT/scan features, and functional safety options). Adapting flexibly to customer requirements. Cross functional aspects: Work closely with memory compiler design leads on circuit design specification, implementation, and model definition. Implement common best practices across the global memories team (collaborating with other global NXP experts). Engage with global SoC DFT leads on specific requirements for behavioral, emulation, and ATPG models. Support and mentor junior modeling/verification engineers. Job Qualifications: Bachelor’s degree in Electrical Engineering, Computer Engineering, or related discipline. (Master’s degree preferred). 10+ years of industry experience. Good knowledge of scripting languages such as Perl, tcl, or Python. Experience with Verilog language, with experience in Verilog model development for memories strongly preferred. Experience with functional test bench development. Experience with formal verification methods and tools strongly preferred. Knowledge of DFT / ATPG methodology is a plus. Familiarity with System Verilog. Familiarity with circuit design;  knowledge of SRAM/ROM memory circuit design is a big plus. Creative mindset, with strong analytical and problem solving skills. More information about NXP in the United States... NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals. #LI-97b2