Senior Power and Thermal Engineer - Feature… at Nvidia · Santa…

Senior Power and Thermal Engineer - Feature Design and Verification Location: US, CA, Santa Clara As one of the technology industry's most desirable employers, NVIDIA has been redefining accelerated computing, computer graphics, and leading the Artificial Intelligence revolution. NVIDIA's innovation is fueled by its great technology and amazing people. We are seeking a Senior Power and Performance Architect to influence, innovate, and drive next-generation power management and power features to market. As part of the Silicon Co-Design Team, we architect and deliver groundbreaking system solutions that integrate all aspects of the system from silicon design, software design, operations, and final deployment in multiple market segments that NVIDIA serves. This position offers a unique opportunity to collaborate across multiple organizations within the company and to grow your career in a high-impact role. We need a passionate, hard-working, and creative individual to lead the power features from architecture through delivery in the final product. What you'll be doing: Work with design owners across the company to understand chip, module, and datacenter power features and develop in-depth system design plans to meet compliance using AI tools to bridge cross-team assumption gaps and accelerate documentation. BringUp and validate compliance features on silicon; apply AI-driven tools to reduce debug cycle time and correlate silicon behavior with simulation at scale. Deliver system-level power optimizations spanning across silicon, platform, software, manufacturing, and product systems; create/leverage AI models for power prediction, binning optimization, and Vmin/Fmax characterization across products. Lead power feature requirements and schedule from architecture to silicon; build or guide the development of AI agents scoped to your charter, such as thermal-to-SW assumption checkers, binning coherence agents, or state machine verification agents. Develop AI-agentic methodologies for power modeling, measurement, and characterization; drive silicon-to-simulation correlation; and create/establish data pipelines and human-in-the-loop review workflows to accelerate codesign. Work alongside system architects, designers, marketing teams, chip and board designers, software/firmware engineers, ATE engineers, and AI engineering partners to bring industry-defining products to market. What we need to see: BS or MS in EE, CE, CS, Systems Engineering, or equivalent experience. 6+ years in the area of silicon and product power and power management, with expertise in transistor/device physics, power modeling, measurement, and active power management. Experience with system-level features, product binning methods, optimization techniques, and tools for data analysis and statistics. Familiarity with AI/ML-assisted workflows for power characterization, yield analysis, silicon debug, or log correlation, including comfort using Python, LLMs, or data science tooling alongside core EDA flows. Hands-on post-silicon bring-up and validation experience; frequency and power characterization background strongly preferred. Experience working with offshore teams is required; excellent problem-solving, partnership, and interpersonal skills are required. Exposure to CPU/GPU/SoC architecture and HW-SW co-design is a plus. Ways to stand out from the crowd: You are a codesign engineer who has learned to build with AI to understand power design and cross-design well enough to specify what an agent must know, evaluate its output, and create closed-loop workflows. Hands-on experience building or piloting AI agents, copilots, or automation tools within a power, thermal, or silicon validation workflow, not just using AI tools, but shaping them for domain-specific problems. Track record of using LLMs or ML models to catch the class of bugs that live in assumptions between teams, thermal-to-software, power-to-binning, or spec-to-silicon mismatches. Familiarity with the full codesign arc (Innovate to Realize) and experience identifying handoff points where agents can assist or automate cross-team contract verification. Publications, open-source contributions, or internal tooling that demonstrates applied AI expertise in an EDA, semiconductor, or hardware validation context. NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you! #LI-Hybrid Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until May 17, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.