Principal Validation Engineer at Microsoft in Mountain View, CA

Overview
The Artificial Intelligence Silicon Engineering team is seeking passionate, driven, and intellectually curious computer/electrical engineers to deliver premium-quality designs once considered impossible.   We are responsible for delivering cutting-edge AI designs that can perform complex and high-performance functions in an extremely efficient manner.
We are looking for a Principal Validation Engineer to join the Microsoft Artificial Intelligence System on Chip (AISoC) Silicon team. In this role, you will play a key role in silicon bring-up, Electrical and functional validation, and lab infrastructure development for next-generation AI silicon. You will work across silicon validation, board design, electrical engineering, FPGA prototyping, and system integration, enabling successful execution from first silicon through product readiness.
The ideal candidate combines strong post-silicon validation experience with hands-on expertise in hardware platforms, electrical engineering, board-level debug, and lab operations.
Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.
In alignment with our Microsoft values, we are committed to cultivating an inclusive work environment for all employees to positively impact our culture every day.

Responsibilities
Silicon bring-up and validation of complex AI SoCs, FPGA prototypes, and hardware platforms.
Drive board-level debug and root-cause analysis across silicon, firmware, power delivery, clocks, resets, and high-speed interfaces.
Partner with PCB, Package, Power, Mechanical, Signal Integrity, Design, Verification, and Architecture teams to develop and validate hardware platforms.
Review schematics, PCB layouts, power architecture, and board designs to ensure robust validation and bring-up readiness.
Define and execute electrical characterization plans including power, thermal, margining, and high-speed interface validation.
Develop validation strategies, test plans, firmware, and automation infrastructure for pre-silicon and post-silicon environments.
Architect, deploy, and maintain validation labs including rack infrastructure, FPGA platforms, automation frameworks, and lab instrumentation.
Utilize lab equipment including oscilloscopes, logic analyzers, protocol analyzers, waveform generators, power analyzers, and environmental systems to debug complex hardware and system issues.
Drive system integration and debug across PCIe, Ethernet, DDR/HBM, JTAG, I2C, SPI, UART, and other platform interfaces.
Collaborate with cross-functional teams to influence next-generation silicon, board, and platform designs.
Improve validation efficiency through innovative debug methodologies, automation, and lab workflows.
Mentor engineers in hardware bring-up, lab debugging, electrical engineering fundamentals, and validation methodologies.

Qualifications
Required/minimum qualifications
Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience
OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience
OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience
OR equivalent experience.
Other Requirements
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations.  As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.
Preferred Qualifications:
10+ years of related technical engineering experience
OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience
OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience or internship experience
OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
10+ years of experience in pre-silicon and post-silicon validation with a proven track record of delivering high performance Central Processing Unit (CPU), Vector processors and Graphics Processing Unit (GPU’s) or relevant experience.
Experience leading validation lab planning, deployment, operation, and scaling activities.
Experience with PCB design flows, schematic capture, signal integrity, power integrity, and board manufacturing processes.
Experience supporting multiple silicon product cycles from platform definition through production.
Understanding of power delivery networks, voltage regulators, clocking architectures, and thermal systems.
Experience driving cross-functional execution with EE, ME, firmware, design, architecture, and validation teams.
Excellent communication, leadership, and problem-solving skills.

Silicon Engineering IC5 - The typical base pay range for this role across the U.S. is USD $142,800 - $274,800 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000 - $304,200 per year.
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:
https://careers.microsoft.com/us/en/us-corporate-pay

This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.

Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.
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