Senior Design Engineer II at Microchip… · Hyderabad

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.

Visit our careers page to see what exciting opportunities and company perks await!

Job Description:

NCS Design team works on design of High bandwidth Ethernet / PCIe switches and ARM/MIPS CPU sub-systems integrated with these switches. Working on various aspects of ASIC design, predominantly Logic Design (Digital design) this includes architecture, design specification, micro architecture, RTL Coding (SystemVerilog, VHDL) for high speed, multiple clock domain networking ASICs, Lint and CDC, specifying design constraints, Synthesis, Equivalence checking.

Requirements/Qualifications:

Excellent Logic design, FSM design skills. Ability to model logic using HDL’s like System Verilog or VHDL using synthesizable design constructs. Strong in HDL’s – System Verilog / VHDL, structured and layered coding practices including familiarity with OOPS concepts. Must be willing to learn new technologies, get familiar with new standards. Strong in digital design, Micro-Architecture, Design documentation and RTL coding for IP blocks. Familiar with Armv7-A processor architecture like Cortex A7, Cortex A9 or any other processor. Familiar with bus protocols like AXI, AHB and APB. Masters Degree in Engineering with specialization in Electronics / VLSI from one of the reputed institutes with minimum of 5 years experience.

Travel Time:

0% - 25%

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