Silicon Packaging Design Engineer at Intel in Phoenix, AZ

Summary: Intel is a leading technology company focused on semiconductor manufacturing and innovation. The Silicon Packaging Design Engineer will drive the development of advanced substrate designs and collaborate with cross-functional teams to ensure optimal performance and manufacturability of high-performance applications. Responsibilities: - Drive the physical layout and routing of package designs, ensuring alignment with silicon, package, and board performance requirements - Perform substrate fit and routing studies to establish design, performance, and cost tradeoffs - Define and implement substrate design rules, conducting internal and external reviews to ensure designs meet quality standards - Analyze data, resolve Design Rule Checks (DRCs), and optimize package designs for manufacturability and performance - Collaborate with cross-functional teams to optimize pinout and silicon-package-board interactions - Complete documentation and collateral into the product lifecycle management system of record Required Qualifications: - Bachelors with 1+ years of experience or master's degree with 6 months of experience in Electrical Engineering, Mechanical Engineering, or Material Sciences disciplines - 6+ months of experience with the following technical skills: - Experience and/or familiarity with microelectronic package or PCB physical layout design and manufacturing process - Familiarity with package design tools like Siemens Xpedition, Cadence Allegro Package Design, AutoCAD, or SolidWorks - Familiarity with physical layout aspects of substrate design, including custom layouts, floor plans, or schematic layout conversion Preferred Qualifications: - Experience in microelectronic package substrate design, package I/O routing, and/or technology development - Familiarity with microelectronic package electrical modeling and simulation tools such as PowerDC, HyperLynx, Q3D, and HFSS - Strong analytical ability and problem-solving skills, including debugging and providing creative solutions - Experience with package design tools such as Package Layout Automation (PLA) and FIELD - Experience with scripting using Python, VB, C, or similar languages Required Skills: Microelectronic package design, PCB physical layout design, Manufacturing process knowledge, Siemens Xpedition, Cadence Allegro Package Design, AutoCAD, SolidWorks, Substrate design, Package I/O routing, Electrical modeling, simulation, PowerDC, HyperLynx, Q3D, HFSS, Package Layout Automation (PLA), FIELD, Python, VB, C, Analytical ability Benefits: Competitive pay, Stock bonuses, Benefit programs which include health, retirement, and vacation