Product Packaging Engineer at Intel in US, Arizona, Phoenix

Summary: Intel is a leading technology company focused on delivering cutting-edge products and solutions. The Product Packaging Engineer will design and develop innovative packaging solutions that ensure the secure transportation and optimal performance of Intel's products globally, while collaborating with various teams to enhance efficiency and support growth in the semiconductor industry. Responsibilities: - Design, develop, and qualify packaging solutions and materials that meet product and regulatory requirements - Lead packaging development processes, including artwork creation, concepts, prototypes, qualification testing, and specification documentation - Collaborate with manufacturing, logistics, regulatory, and supply chain partners to ensure packaging solutions meet operational needs - Identify and implement cost-saving, waste-reduction, and efficiency improvement measures for packaging processes - Conduct risk analysis to ensure packaging solutions comply with regulations and align with Intel's quality standards - Consult with cross-organizational teams on branding, marketing, SKUs, labeling, and bills of material requirements for shipments into Intel's distribution channel - Evaluate and qualify vendors to ensure high-quality packaging manufacturing startup and scalability - Benchmark packaging designs and processes against industry standards to maintain a competitive edge - Document and maintain technical specifications for packaging solutions to ensure consistency and clarity Required Qualifications: - Possess a Master's degree in Engineering, Physics, Chemistry, or a related STEM field with 1+ years of educational or work experience - Or a PhD degree in the same fields with 6+ months of educational or work experience - Your experience described above must be in the following: Product packaging assembly processes and production methodologies - Statistical process control (SPC) principles and design of experiments (DOE) techniques - Analytical skills with proficiency in data analysis and risk assessment methods - Design for manufacturing (DFM) practices and packaging test criteria Preferred Qualifications: - Experience with Surface Mount Technologies, solder joint formation/quality/reliability, and package certification methodologies - Experience leading technical teams, influencing stakeholders, and managing resources and timelines in a matrixed environment - Familiarity with semiconductor device fabrication processes and packaging process flows - A track record of delivering results in time-critical technical projects involving innovation and strategic planning - Apply problem-solving techniques and fundamental engineering concepts to create novel, efficient solutions Required Skills: Product packaging assembly processes, Production methodologies, Statistical process control (SPC), Design of experiments (DOE), Data analysis, Risk assessment, Design for manufacturing (DFM), Packaging test criteria, Surface Mount Technologies, Solder joint quality, Package certification methodologies, Semiconductor device fabrication processes, Packaging process flows, Stakeholder management, Resource, timeline management Benefits: Competitive pay, Stock bonuses, Health, Retirement, Vacation