IP and Subsystem Validation Engineering Manager at Intel · Bengaluru

IP and Subsystem Validation Engineering Manager Location: India, Bangalore Job Details: Job Description: The Role and Impact As an IP Design Verification Engineer, you will play a pivotal role in ensuring the reliability, functionality, and efficiency of cutting-edge IP designs. Your work will directly contribute to Intel's success by helping deliver high-quality solutions that meet stringent microarchitectural specifications. Through your expertise, you will collaborate with cross-functional teams to drive innovation in verification methodologies, uncover design bugs, and implement corrective measures, thereby helping Intel maintain its leadership in the semiconductor industry. Key Responsibilities - Develop detailed IP verification plans and implement advanced test benches and environments to validate designs against specifications. - Execute verification plans by running system simulation models to analyze functionality, power, and timing. - Identify, replicate, root cause, and debug issues in the presilicon environment, ensuring that all failing tests are addressed and resolved. - Collaborate closely with architects, RTL developers, and physical design teams to improve verification coverage and enable successful delivery of complex features. - Document verification test plans, results, and methodologies; lead technical reviews with internal teams to ensure alignment and quality. - Maintain and enhance existing functional verification infrastructure, tools, and methodologies to improve efficiency and reliability. - Contribute to defining and implementing verification infrastructure and TFMs (Test Framework Methodologies) required for functional design verification. Qualifications: Minimum Qualifications - Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, and 12+ years of relevant experience; or Master's degree with 8+ years of experience; or PhD with 6+ years of experience. - Proficiency in RTL Design (e.g., Verilog, SystemVerilog) and Design for Verification (DFV) methodologies. - Expertise in IP validation tools, test writing, and test planning with a strong understanding of simulation and debugging techniques. - Demonstrated experience with verification methodologies, including Formal Verification, Assertion-Based Verification, and Coverage-Based Verification. - Strong problem-solving skills and ability to identify, isolate, and address bugs effectively. Preferred Qualifications - Proven ability to work in collaborative, cross-functional teams to achieve shared goals. - Strong communication skills with a focus on technical documentation and team presentations. - Leadership experience in driving technical reviews and mentoring junior team members. - Familiarity with industry trends, tools, and methodologies for IP design and verification. Join Intel and be part of a team that's shaping the future of technology. Apply today to drive meaningful impact and take your career to the next level. Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change. * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.