Associate Engineer, Design Verification… at Analog Devices · Cavite

Associate Engineer, Design Verification Engineering Location: Philippines, Cavite, GTC Come join Analog Devices (ADI) – a place where Innovation meets Impact. For more than 55 years, Analog Devices has been inventing new breakthrough technologies that transform lives. At ADI you will work alongside the brightest minds to collaborate on solving complex problems that matter from autonomous vehicles, drones and factories to augmented reality and remote healthcare. ADI fosters a culture that focuses on employees through beneficial programs, aligned goals, continuous learning opportunities, and practices that create a more sustainable future. About Analog Devices Analog Devices, Inc. (NASDAQ:ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more atwww.analog.com and onLinkedIn andTwitter (X). Digital Design Verification Engineer Analog Devices is seeking a Digital Design Verification Engineer (P1) to join the Sustainable Automation (SAU) organization. This role is responsible for executing simulation‑based verification of digital RTL designs to ensure functional correctness, quality, and robustness prior to silicon tape‑out. The ideal candidate will contribute to block‑level and subsystem‑level verification activities, working closely with digital design engineers and cross‑functional teams. This is an entry‑level individual contributor role, well‑suited for candidates building foundational expertise in digital verification methodologies within a structured and collaborative engineering environment. Key Responsibilities Execute digital RTL verification for assigned blocks and subsystems using simulation‑based methodologies. Develop, maintain, and execute SystemVerilog‑based testbenches under established verification frameworks. Implement directed and basic constrained‑random test scenarios to validate design functionality. Analyze simulation results, identify functional issues, and support root‑cause debug in partnership with design engineers. Contribute to functional and code coverage collection; assist in closing coverage gaps. Support regression testing and help ensure repeatable, reliable verification results. Review design specifications and participate in verification and design reviews. Document verification status, test results, and identified issues clearly and accurately. Adhere to ADI verification methodologies, coding standards, and development processes. Continuously develop technical skills through mentoring, training, and hands‑on project experience. Minimum Qualifications Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related technical discipline. Foundational understanding of digital logic and RTL design principles. Familiarity with SystemVerilog and/or Verilog. Basic knowledge of simulation‑based functional verification concepts. Exposure to Linux/UNIX development environments. Strong analytical, debugging, and problem‑solving skills. Effective written and verbal communication skills. Ability to work productively in a team‑oriented environment. Preferred Qualifications Coursework, internship, or project experience in digital ASIC or SoC verification. Awareness of UVM concepts, including sequences, drivers, and monitors. Introductory experience with SystemVerilog Assertions (SVA). Familiarity with functional and code coverage. Experience with scripting languages such as Python or Perl. Exposure to version control tools (e.g., Git, Perforce) and regression workflows. Scope and Impact Performs verification tasks for well‑defined digital blocks with guidance from senior engineers. Work is reviewed for technical quality, completeness, and adherence to process. Contributes to early detection of functional issues, supporting first‑pass silicon success. Primary impact is at the block or subsystem level. For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process. Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group. Job Req Type: Graduate Job Required Travel: Yes, 10% of the time