ASIC Physical Design Tools, Flows, Methodologies Manager

Manage, mentor, and grow a team of tools, flows, and methodologies (TFM) engineers supporting custom silicon development for Tensor Processing Unit (TPU) products. Oversee the physical design methodology, driving the development and optimization of flows including place and route (P&R), RC extraction, logic equivalency checking (LEC), static timing analysis (STA), EMIR, and physical verification. Triage and manage team priorities across tapeouts, balancing flow bugs, feature developments, and methodology improvements. Collaborate with internal physical design (PD) execution teams, register-transfer level (RTL) designers, and external electronic design automation (EDA) vendors to troubleshoot flow issues, improve tool quality of results (QoR), and drive vendor enhancements. Define and execute the roadmap for flow automation, runtime efficiency, and scalability across process nodes.