DV Intern - Summer 2027

Summary: Etched is building the world’s first AI inference system purpose-built for transformers, delivering over 10x higher performance and dramatically lower cost and latency. As a Design Verification intern, you will ensure the custom IPs powering our chips are robust, high-performance, and silicon-ready, collaborating with architects and designers to validate correctness and performance across the hardware-software stack. Responsibilities: - Ensure the custom IPs powering our chips are robust, high-performance, and silicon-ready - Collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack Required Qualifications: - Progress towards a Bachelor's, Master's, or PhD degree in electrical engineering, computer engineering, or a related field - Familiarity with high-speed digital logic - Exposure to ASIC or SoC design concepts - Familiarity with SystemVerilog, UVM, or Python - Familiarity with verification work and writing test benches - Familiarity with physical design flows and tooling - Are able to learn quickly about transformers and other aspects of modern artificial intelligence Preferred Qualifications: - Familiarity with transformer models and machine learning - UVM or formal verification experience - Ability to program with Python or another scripting language Required Skills: High-speed digital logic, ASIC design, SoC design, SystemVerilog, UVM, Python, Verification test benches, Physical design flows, Transformer models, Machine learning, Formal verification Internship Start Date: Start in 2027 Summer Benefits: 12-week paid internship, Generous housing support for those relocating, Daily lunch and dinner in our office, Based at our office in San Jose, CA, Direct mentorship from industry leaders and world-class engineers