Principal IC Layout Engineer

Principal IC Layout Engineer Location: US, MA, Wilmington About Analog Devices Analog Devices, Inc. (NASDAQ:ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more atwww.analog.com and onLinkedIn andTwitter (X). Principal IC Layout Engineer About the ATE Group: The Automatic Test Equipment (ATE) organization within Instrumentation delivers high‑performance solutions that enable production testing of advanced electrical and electronic systems—from high‑speed microprocessors to high‑voltage EV battery modules. We partner closely with customers to define cutting‑edge stimulus and measurement architectures, driving improvements in accuracy, energy efficiency, test time, and channel density to provide differentiated ATE capability. About the Role: As a Principal Designer, Layout, you are a recognized expert within ADI, working on uniquely significant and complex layout challenges that have strategic importance to the organization. You provide highly creative solutions, drive innovation, and serve as a technical authority while developing and mentoring others across the organization. Key Responsibilities: Physical design lead of high-speed and high-performance analog, mixed-signal, and digital products and subsystems, including ADCs, DACs, PLLs,  transceivers and receivers. Develop and integrate complex chip, subsystems in advanced CMOS FinFET technologies (16nm and below) Drive floorplan development at block, subsystem, and full-chip levels for designs of significant size and complexity. Collaborate with cross-functional teams—including DFT, clock, timing, power integrity, RTL, packaging, and analog designers—to ensure seamless integration and successful design closure. Define, implement, and continuously improve design methodologies, best practices, and automation workflows; promote knowledge sharing across teams. Lead physical verification processes including DRC, LVS, ERC, density checks, extraction, EM/IR analysis, and final signoff for tapeout. Develop project schedules, monitor progress, and ensure timely delivery of high-quality design milestones. Mentor and lead layout teams, fostering technical growth and ensuring project success Must Have Skills: Technical Authority: Recognized technical expertise with influence throughout the organization and industry Industry-Leading Expertise: Industry-leading expertise in IC layout, architecture design, and process optimization Technical Collaboration Excellence: Capability to drive teams to their highest performance and create supportive and collaborative environments Leadership Excellence: Demonstrated leadership in promoting teamwork and organizational effectiveness Preferred Education and Experience: Bachelor's degree in Electrical/Computer Engineering or related field, or equivalent experience 10+ years of full custom IC layout experience Proficiency with Cadence Virtuoso, including strong VXL expertise. Deep understanding of LVS, DRC, antenna checks, and associated verification/debug methodologies. For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process. Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group. EEO is the Law: Notice of Applicant Rights Under the Law. Job Req Type: Experienced Required Travel: Yes, 10% of the time Shift Type: 1st Shift/Days The expected wage range for a new hire into this position is $159,638 to $239,457. Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors. This position qualifies for a discretionary performance-based bonus which is based on personal and company factors. This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.